The advanced VHDLcourse includes advanced RTL features as well as verification behavioral capabilities :

- VHDL Configurations

- VHDL Arrays

- Modeling memories in VHDL, creating inferred memories in RTL

- Modeling and inferring FIFOs in VHDL

- VHDL Signal Hierarchy

- VHDLGenerics , Records, and Alias

- VHDL File I/O , and TextIO

- Creating pseudo-code for simulations

- Developing VHDL Bus Functional Models